From 0bb161fd0944ee7b2209642d6315dfa9267ebd67 Mon Sep 17 00:00:00 2001
From: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
Date: Fri, 10 Apr 2026 02:15:51 +0200
Subject: [PATCH] swscale/x86/output: Simplify creating dither register

Only the lower quadword needs to be rotated, because
the register is zero-extended immediately afterwards anyway.

Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
---
 libswscale/x86/output.asm | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/libswscale/x86/output.asm b/libswscale/x86/output.asm
index f2e884780a..7d87dd919c 100644
--- a/libswscale/x86/output.asm
+++ b/libswscale/x86/output.asm
@@ -253,8 +253,10 @@ cglobal yuv2planeX_%1, %3, 8, %2, filter, fltsize, src, dst, w, dither, offset
     jz              .no_rot
 %if mmsize == 16
     punpcklqdq  m_dith,  m_dith
-%endif ; mmsize == 16
+    psrldq      m_dith,  3
+%else
     PALIGNR     m_dith,  m_dith,  3,  m0
+%endif ; mmsize == 16
 .no_rot:
 %if mmsize == 16
     punpcklbw   m_dith,  m6