diff --git a/configure b/configure index b8e920127c..38cbfd3d1b 100755 --- a/configure +++ b/configure @@ -476,6 +476,7 @@ Optimization options (experts only): --disable-armv6t2 disable armv6t2 optimizations --disable-vfp disable VFP optimizations --disable-neon disable NEON optimizations + --disable-arm-crc disable ARM/AArch64 CRC optimizations --disable-dotprod disable DOTPROD optimizations --disable-i8mm disable I8MM optimizations --disable-sve disable SVE optimizations @@ -2231,6 +2232,7 @@ ARCH_EXT_LIST_ARM=" armv6 armv6t2 armv8 + arm_crc dotprod i8mm neon @@ -2504,6 +2506,7 @@ SYSTEM_LIBRARIES=" TOOLCHAIN_FEATURES=" as_arch_directive + as_archext_crc_directive as_archext_dotprod_directive as_archext_i8mm_directive as_archext_sve_directive @@ -2838,6 +2841,7 @@ intrinsics_sse2_deps="sse2" vfp_deps="arm" vfpv3_deps="vfp" setend_deps="arm" +arm_crc_deps="aarch64" dotprod_deps="aarch64 neon" i8mm_deps="aarch64 neon" sve_deps="aarch64 neon" @@ -6470,7 +6474,8 @@ if enabled aarch64; then # internal assembler in clang 3.3 does not support this instruction enabled neon && check_insn neon 'ext v0.8B, v0.8B, v1.8B, #1' - archext_list="dotprod i8mm sve sve2 sme" + archext_list="arm_crc dotprod i8mm sve sve2 sme" + enabled arm_crc && check_archext_name_insn arm_crc crc 'crc32x w0, w0, x0' enabled dotprod && check_archext_insn dotprod 'udot v0.4s, v0.16b, v0.16b' enabled i8mm && check_archext_insn i8mm 'usdot v0.4s, v0.16b, v0.16b' enabled sve && check_archext_insn sve 'whilelt p0.s, x0, x1' diff --git a/libavutil/aarch64/asm.S b/libavutil/aarch64/asm.S index 77cea57cfc..d1e118d7d1 100644 --- a/libavutil/aarch64/asm.S +++ b/libavutil/aarch64/asm.S @@ -40,6 +40,14 @@ .arch AS_ARCH_LEVEL #endif +#if HAVE_AS_ARCHEXT_CRC_DIRECTIVE +#define ENABLE_ARM_CRC .arch_extension crc +#define DISABLE_ARM_CRC .arch_extension nocrc +#else +#define ENABLE_ARM_CRC +#define DISABLE_ARM_CRC +#endif + #if HAVE_AS_ARCHEXT_DOTPROD_DIRECTIVE #define ENABLE_DOTPROD .arch_extension dotprod #define DISABLE_DOTPROD .arch_extension nodotprod @@ -80,6 +88,7 @@ #define DISABLE_SME #endif +DISABLE_ARM_CRC DISABLE_DOTPROD DISABLE_I8MM DISABLE_SVE