configure: add detection of assembler support for SME2

Makefile

@@ -113,7 +113,7 @@ SUBDIR_VARS := CLEANFILES FFLIBS HOSTPROGS TESTPROGS TOOLS               \
                MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSP-OBJS MSA-OBJS         \
                MMI-OBJS LSX-OBJS LASX-OBJS RV-OBJS RVV-OBJS RVVB-OBJS    \
                OBJS SHLIBOBJS STLIBOBJS HOSTOBJS TESTOBJS SIMD128-OBJS   \
-               SVE-OBJS SVE2-OBJS SME-OBJS
+               SVE-OBJS SVE2-OBJS SME-OBJS SME2-OBJS
 
 define RESET
 $(1) :=

configure

@@ -485,6 +485,7 @@ Optimization options (experts only):
   --disable-sve            disable SVE optimizations
   --disable-sve2           disable SVE2 optimizations
   --disable-sme            disable SME optimizations
+  --disable-sme2           disable SME2 optimizations
   --disable-inline-asm     disable use of inline assembly
   --disable-x86asm         disable use of standalone x86 assembly
   --disable-mipsdsp        disable MIPS DSP ASE R1 optimizations
@@ -2303,6 +2304,7 @@ ARCH_EXT_LIST_ARM="
     sve
     sve2
     sme
+    sme2
 "
 
 ARCH_EXT_LIST_MIPS="
@@ -2573,6 +2575,7 @@ TOOLCHAIN_FEATURES="
     as_archext_sve_directive
     as_archext_sve2_directive
     as_archext_sme_directive
+    as_archext_sme2_directive
     as_dn_directive
     as_fpu_directive
     as_func
@@ -2914,6 +2917,7 @@ i8mm_deps="aarch64 neon"
 sve_deps="aarch64 neon"
 sve2_deps="aarch64 neon sve"
 sme_deps="aarch64 neon sve sve2"
+sme2_deps="aarch64 neon sve sve2 sme"
 
 map 'eval ${v}_inline_deps=inline_asm' $ARCH_EXT_LIST_ARM
 
@@ -6551,13 +6555,14 @@ if enabled aarch64; then
     # internal assembler in clang 3.3 does not support this instruction
     enabled neon && check_insn neon 'ext   v0.8B, v0.8B, v1.8B, #1'
 
-    archext_list="arm_crc dotprod i8mm sve sve2 sme"
+    archext_list="arm_crc dotprod i8mm sve sve2 sme sme2"
     enabled arm_crc && check_archext_name_insn arm_crc crc 'crc32x w0, w0, x0'
     enabled dotprod && check_archext_insn dotprod 'udot v0.4s, v0.16b, v0.16b'
     enabled i8mm    && check_archext_insn i8mm    'usdot v0.4s, v0.16b, v0.16b'
     enabled sve     && check_archext_insn sve     'whilelt p0.s, x0, x1'
     enabled sve2    && check_archext_insn sve2    'sqrdmulh z0.s, z0.s, z0.s'
     enabled sme     && check_archext_insn sme     'smstart' 'cntb x0'
+    enabled sme2    && check_archext_insn sme2    'smstart' 'sdot za.s[w10, 0], {z0.b-z3.b}, {z4.b-z7.b}'
 
     # Disable the main feature (e.g. HAVE_NEON) if neither inline nor external
     # assembly support the feature out of the box. Skip this for the features
@@ -8387,6 +8392,7 @@ if enabled aarch64; then
     echo "SVE enabled               ${sve-no}"
     echo "SVE2 enabled              ${sve2-no}"
     echo "SME enabled               ${sme-no}"
+    echo "SME2 enabled              ${sme2-no}"
 fi
 if enabled arm; then
     echo "ARMv5TE enabled           ${armv5te-no}"

ffbuild/arch.mak

@@ -6,6 +6,7 @@ OBJS-$(HAVE_NEON)    += $(NEON-OBJS)    $(NEON-OBJS-yes)
 OBJS-$(HAVE_SVE)     += $(SVE-OBJS)     $(SVE-OBJS-yes)
 OBJS-$(HAVE_SVE2)    += $(SVE2-OBJS)    $(SVE2-OBJS-yes)
 OBJS-$(HAVE_SME)     += $(SME-OBJS)     $(SME-OBJS-yes)
+OBJS-$(HAVE_SME2)    += $(SME2-OBJS)    $(SME2-OBJS-yes)
 
 OBJS-$(HAVE_MIPSFPU)   += $(MIPSFPU-OBJS)    $(MIPSFPU-OBJS-yes)
 OBJS-$(HAVE_MIPSDSP)   += $(MIPSDSP-OBJS)    $(MIPSDSP-OBJS-yes)

libavutil/aarch64/asm.S

@@ -88,12 +88,21 @@
 #define DISABLE_SME
 #endif
 
+#if HAVE_AS_ARCHEXT_SME2_DIRECTIVE
+#define ENABLE_SME2   .arch_extension sme2
+#define DISABLE_SME2  .arch_extension nosme2
+#else
+#define ENABLE_SME2
+#define DISABLE_SME2
+#endif
+
 DISABLE_ARM_CRC
 DISABLE_DOTPROD
 DISABLE_I8MM
 DISABLE_SVE
 DISABLE_SVE2
 DISABLE_SME
+DISABLE_SME2
 
 
 /* Support macros for

libavutil/aarch64/cpu.c

@@ -30,6 +30,7 @@
 #define HWCAP2_AARCH64_SVE2   (1 << 1)
 #define HWCAP2_AARCH64_I8MM   (1 << 13)
 #define HWCAP2_AARCH64_SME    (1 << 23)
+#define HWCAP2_AARCH64_SME2   (1ULL << 37)
 
 static int detect_flags(void)
 {
@@ -50,6 +51,8 @@ static int detect_flags(void)
         flags |= AV_CPU_FLAG_I8MM;
     if (hwcap2 & HWCAP2_AARCH64_SME)
         flags |= AV_CPU_FLAG_SME;
+    if (hwcap2 & HWCAP2_AARCH64_SME2)
+        flags |= AV_CPU_FLAG_SME2;
 
     return flags;
 }
@@ -77,6 +80,8 @@ static int detect_flags(void)
         flags |= AV_CPU_FLAG_SME;
     if (have_feature("hw.optional.armv8_crc32"))
         flags |= AV_CPU_FLAG_ARM_CRC;
+    if (have_feature("hw.optional.arm.FEAT_SME2"))
+        flags |= AV_CPU_FLAG_SME2;
 
     return flags;
 }
@@ -150,6 +155,10 @@ static int detect_flags(void)
 #ifdef PF_ARM_SME_INSTRUCTIONS_AVAILABLE
     if (IsProcessorFeaturePresent(PF_ARM_SME_INSTRUCTIONS_AVAILABLE))
         flags |= AV_CPU_FLAG_SME;
+#endif
+#ifdef PF_ARM_SME2_INSTRUCTIONS_AVAILABLE
+    if (IsProcessorFeaturePresent(PF_ARM_SME2_INSTRUCTIONS_AVAILABLE))
+        flags |= AV_CPU_FLAG_SME2;
 #endif
     return flags;
 }
@@ -185,6 +194,9 @@ int ff_get_cpu_flags_aarch64(void)
 #ifdef __ARM_FEATURE_CRC32
     flags |= AV_CPU_FLAG_ARM_CRC;
 #endif
+#ifdef __ARM_FEATURE_SME2
+    flags |= AV_CPU_FLAG_SME2;
+#endif
 
     flags |= detect_flags();
 

libavutil/aarch64/cpu.h

@@ -31,6 +31,7 @@
 #define have_sve(flags)     CPUEXT(flags, SVE)
 #define have_sve2(flags)    CPUEXT(flags, SVE2)
 #define have_sme(flags)     CPUEXT(flags, SME)
+#define have_sme2(flags)    CPUEXT(flags, SME2)
 
 #if HAVE_SVE
 int ff_aarch64_sve_length(void);

libavutil/cpu.c

@@ -189,6 +189,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s)
         { "sve2",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SVE2     },    .unit = "flags" },
         { "sme",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SME      },    .unit = "flags" },
         { "crc",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARM_CRC  },    .unit = "flags" },
+        { "sme2",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SME2     },    .unit = "flags" },
 #elif ARCH_MIPS
         { "mmi",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMI      },    .unit = "flags" },
         { "msa",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MSA      },    .unit = "flags" },

libavutil/cpu.h

@@ -79,6 +79,7 @@
 #define AV_CPU_FLAG_SVE2         (1 <<11)
 #define AV_CPU_FLAG_SME          (1 <<12)
 #define AV_CPU_FLAG_ARM_CRC      (1 <<13)
+#define AV_CPU_FLAG_SME2         (1 <<14)
 #define AV_CPU_FLAG_SETEND       (1 <<16)
 
 #define AV_CPU_FLAG_MMI          (1 << 0)

libavutil/tests/cpu.c

@@ -50,6 +50,7 @@ static const struct {
     { AV_CPU_FLAG_SVE2,      "sve2"       },
     { AV_CPU_FLAG_SME,       "sme"        },
     { AV_CPU_FLAG_ARM_CRC,   "crc"        },
+    { AV_CPU_FLAG_SME2,      "sme2"       },
 #elif ARCH_ARM
     { AV_CPU_FLAG_ARMV5TE,   "armv5te"    },
     { AV_CPU_FLAG_ARMV6,     "armv6"      },

tests/checkasm/checkasm.c

@@ -378,6 +378,7 @@ static const struct {
     { "SVE2",     "sve2",     AV_CPU_FLAG_SVE2 },
     { "SME",      "sme",      AV_CPU_FLAG_SME },
     { "CRC",      "crc",      AV_CPU_FLAG_ARM_CRC },
+    { "SME2",     "sme2",      AV_CPU_FLAG_SME2 },
 #elif ARCH_ARM
     { "ARMV5TE",  "armv5te",  AV_CPU_FLAG_ARMV5TE },
     { "ARMV6",    "armv6",    AV_CPU_FLAG_ARMV6 },