mirror of
https://mirror.skon.top/https://github.com/FFmpeg/FFmpeg
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3ec48e4bc6
Signal that our assembly is compliant with the GCS feature, if
the GCS feature is enabled in the compiler (available since Clang
18 and GCC 15) - this is enabled by -mbranch-protection=standard
with a new enough compiler.
GCS doesn't require any specific modifications to the assembly
code, but requires that all functions return to the expected call
address (checked through a shadow stack).
(cherry picked from commit 846746be4b)
341 lines
9.8 KiB
ArmAsm
341 lines
9.8 KiB
ArmAsm
/*
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* Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "config.h"
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#ifdef __ELF__
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# define ELF
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#else
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# define ELF #
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#endif
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#if HAVE_AS_FUNC
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# define FUNC
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#else
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# define FUNC #
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#endif
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#ifndef __has_feature
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# define __has_feature(x) 0
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#endif
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#if HAVE_AS_ARCH_DIRECTIVE
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.arch AS_ARCH_LEVEL
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#endif
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#if HAVE_AS_ARCHEXT_CRC_DIRECTIVE
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#define ENABLE_ARM_CRC .arch_extension crc
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#define DISABLE_ARM_CRC .arch_extension nocrc
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#else
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#define ENABLE_ARM_CRC
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#define DISABLE_ARM_CRC
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#endif
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#if HAVE_AS_ARCHEXT_DOTPROD_DIRECTIVE
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#define ENABLE_DOTPROD .arch_extension dotprod
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#define DISABLE_DOTPROD .arch_extension nodotprod
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#else
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#define ENABLE_DOTPROD
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#define DISABLE_DOTPROD
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#endif
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#if HAVE_AS_ARCHEXT_I8MM_DIRECTIVE
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#define ENABLE_I8MM .arch_extension i8mm
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#define DISABLE_I8MM .arch_extension noi8mm
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#else
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#define ENABLE_I8MM
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#define DISABLE_I8MM
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#endif
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#if HAVE_AS_ARCHEXT_SVE_DIRECTIVE
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#define ENABLE_SVE .arch_extension sve
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#define DISABLE_SVE .arch_extension nosve
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#else
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#define ENABLE_SVE
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#define DISABLE_SVE
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#endif
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#if HAVE_AS_ARCHEXT_SVE2_DIRECTIVE
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#define ENABLE_SVE2 .arch_extension sve2
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#define DISABLE_SVE2 .arch_extension nosve2
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#else
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#define ENABLE_SVE2
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#define DISABLE_SVE2
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#endif
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#if HAVE_AS_ARCHEXT_SME_DIRECTIVE
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#define ENABLE_SME .arch_extension sme
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#define DISABLE_SME .arch_extension nosme
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#else
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#define ENABLE_SME
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#define DISABLE_SME
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#endif
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#if HAVE_AS_ARCHEXT_SME_I16I64_DIRECTIVE
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#define ENABLE_SME_I16I64 .arch_extension sme-i16i64
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#define DISABLE_SME_I16I64 .arch_extension nosme-i16i64
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#else
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#define ENABLE_SME_I16I64
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#define DISABLE_SME_I16I64
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#endif
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#if HAVE_AS_ARCHEXT_SME2_DIRECTIVE
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#define ENABLE_SME2 .arch_extension sme2
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#define DISABLE_SME2 .arch_extension nosme2
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#else
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#define ENABLE_SME2
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#define DISABLE_SME2
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#endif
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DISABLE_ARM_CRC
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DISABLE_DOTPROD
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DISABLE_I8MM
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DISABLE_SVE
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DISABLE_SVE2
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DISABLE_SME
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DISABLE_SME_I16I64
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DISABLE_SME2
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#if HAVE_SME
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.macro sme_entry
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stp x29, x30, [sp, #-80]!
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mov x29, sp
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stp d8, d9, [sp, #16]
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stp d10, d11, [sp, #32]
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stp d12, d13, [sp, #48]
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stp d14, d15, [sp, #64]
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smstart
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.endm
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.macro sme_exit
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smstop
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ldp d8, d9, [sp, #16]
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ldp d10, d11, [sp, #32]
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ldp d12, d13, [sp, #48]
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ldp d14, d15, [sp, #64]
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ldp x29, x30, [sp], #80
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.endm
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#endif
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/* Support macros for
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* - Armv8.3-A Pointer Authentication and
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* - Armv8.5-A Branch Target Identification
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* features which require emitting a .note.gnu.property section with the
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* appropriate architecture-dependent feature bits set.
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*
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* |AARCH64_SIGN_LINK_REGISTER| and |AARCH64_VALIDATE_LINK_REGISTER| expand to
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* PACIxSP and AUTIxSP, respectively. |AARCH64_SIGN_LINK_REGISTER| should be
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* used immediately before saving the LR register (x30) to the stack.
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* |AARCH64_VALIDATE_LINK_REGISTER| should be used immediately after restoring
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* it. Note |AARCH64_SIGN_LINK_REGISTER|'s modifications to LR must be undone
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* with |AARCH64_VALIDATE_LINK_REGISTER| before RET. The SP register must also
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* have the same value at the two points. For example:
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*
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* .global f
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* f:
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* AARCH64_SIGN_LINK_REGISTER
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* stp x29, x30, [sp, #-96]!
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* mov x29, sp
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* ...
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* ldp x29, x30, [sp], #96
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* AARCH64_VALIDATE_LINK_REGISTER
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* ret
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*
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* |AARCH64_VALID_CALL_TARGET| expands to BTI 'c'. Either it, or
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* |AARCH64_SIGN_LINK_REGISTER|, must be used at every point that may be an
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* indirect call target. In particular, all symbols exported from a file must
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* begin with one of these macros. For example, a leaf function that does not
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* save LR can instead use |AARCH64_VALID_CALL_TARGET|:
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*
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* .globl return_zero
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* return_zero:
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* AARCH64_VALID_CALL_TARGET
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* mov x0, #0
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* ret
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*
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* A non-leaf function which does not immediately save LR may need both macros
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* because |AARCH64_SIGN_LINK_REGISTER| appears late. For example, the function
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* may jump to an alternate implementation before setting up the stack:
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*
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* .globl with_early_jump
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* with_early_jump:
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* AARCH64_VALID_CALL_TARGET
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* cmp x0, #128
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* b.lt .Lwith_early_jump_128
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* AARCH64_SIGN_LINK_REGISTER
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* stp x29, x30, [sp, #-96]!
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* mov x29, sp
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* ...
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* ldp x29, x30, [sp], #96
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* AARCH64_VALIDATE_LINK_REGISTER
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* ret
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*
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* .Lwith_early_jump_128:
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* ...
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* ret
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*
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* These annotations are only required with indirect calls. Private symbols that
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* are only the target of direct calls do not require annotations. Also note
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* that |AARCH64_VALID_CALL_TARGET| is only valid for indirect calls (BLR), not
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* indirect jumps (BR). Indirect jumps in assembly are supported through
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* |AARCH64_VALID_JUMP_TARGET|. Landing Pads which shall serve for jumps and
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* calls can be created using |AARCH64_VALID_JUMP_CALL_TARGET|.
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*
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* Although not necessary, it is safe to use these macros in 32-bit ARM
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* assembly. This may be used to simplify dual 32-bit and 64-bit files.
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*
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* References:
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* - "ELF for the Arm® 64-bit Architecture"
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* https: *github.com/ARM-software/abi-aa/blob/master/aaelf64/aaelf64.rst
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* - "Providing protection for complex software"
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* https://developer.arm.com/architectures/learn-the-architecture/providing-protection-for-complex-software
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*/
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#if defined(__ARM_FEATURE_BTI_DEFAULT) && (__ARM_FEATURE_BTI_DEFAULT == 1)
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# define GNU_PROPERTY_AARCH64_BTI (1 << 0) // Has BTI
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# define AARCH64_VALID_CALL_TARGET hint #34 // BTI 'c'
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# define AARCH64_VALID_JUMP_TARGET hint #38 // BTI 'j'
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#else
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# define GNU_PROPERTY_AARCH64_BTI 0 // No BTI
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# define AARCH64_VALID_CALL_TARGET
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# define AARCH64_VALID_JUMP_TARGET
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#endif
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#if defined(__ARM_FEATURE_PAC_DEFAULT)
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# if ((__ARM_FEATURE_PAC_DEFAULT & (1 << 0)) != 0) // authentication using key A
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# define AARCH64_SIGN_LINK_REGISTER paciasp
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# define AARCH64_VALIDATE_LINK_REGISTER autiasp
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# elif ((__ARM_FEATURE_PAC_DEFAULT & (1 << 1)) != 0) // authentication using key B
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# define AARCH64_SIGN_LINK_REGISTER pacibsp
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# define AARCH64_VALIDATE_LINK_REGISTER autibsp
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# else
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# error Pointer authentication defines no valid key!
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# endif
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# if ((__ARM_FEATURE_PAC_DEFAULT & (1 << 2)) != 0)
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# error Authentication of leaf functions is enabled but not supported in FFmpeg!
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# endif
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# define GNU_PROPERTY_AARCH64_PAC (1 << 1)
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#else
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# define GNU_PROPERTY_AARCH64_PAC 0
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# define AARCH64_SIGN_LINK_REGISTER
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# define AARCH64_VALIDATE_LINK_REGISTER
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#endif
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#if defined(__ARM_FEATURE_GCS_DEFAULT) && __ARM_FEATURE_GCS_DEFAULT == 1
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#define GNU_PROPERTY_AARCH64_GCS (1 << 2)
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#else
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#define GNU_PROPERTY_AARCH64_GCS 0 /* No GCS */
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#endif
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#if (GNU_PROPERTY_AARCH64_BTI != 0 || GNU_PROPERTY_AARCH64_PAC != 0 || GNU_PROPERTY_AARCH64_GCS != 0) && defined(__ELF__)
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.pushsection .note.gnu.property, "a"
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.balign 8
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.long 4
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.long 0x10
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.long 0x5
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.asciz "GNU"
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.long 0xc0000000 /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
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.long 4
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.long (GNU_PROPERTY_AARCH64_BTI | GNU_PROPERTY_AARCH64_PAC | GNU_PROPERTY_AARCH64_GCS)
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.long 0
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.popsection
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#endif
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.macro function name, export=0, align=4
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.macro endfunc
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ELF .size \name, . - \name
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FUNC .endfunc
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.purgem endfunc
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.endm
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.text
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.align \align
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.if \export
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.global EXTERN_ASM\name
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ELF .type EXTERN_ASM\name, %function
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FUNC .func EXTERN_ASM\name
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EXTERN_ASM\name:
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AARCH64_VALID_CALL_TARGET
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.else
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ELF .type \name, %function
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FUNC .func \name
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\name:
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.endif
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.endm
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.macro const name, align=4, relocate=0
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.macro endconst
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ELF .size \name, . - \name
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.purgem endconst
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.endm
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#if HAVE_SECTION_DATA_REL_RO
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.if \relocate
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.section .data.rel.ro
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.else
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.section .rodata
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.endif
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#elif defined(_WIN32)
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.section .rdata
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#elif !defined(__MACH__)
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.section .rodata
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#else
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.const_data
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#endif
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.align \align
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\name:
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.endm
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.macro movrel rd, val, offset=0
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#if CONFIG_PIC && defined(__APPLE__)
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.if \offset < 0
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adrp \rd, \val@PAGE
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add \rd, \rd, \val@PAGEOFF
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sub \rd, \rd, -(\offset)
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.else
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adrp \rd, \val+(\offset)@PAGE
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add \rd, \rd, \val+(\offset)@PAGEOFF
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.endif
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#elif CONFIG_PIC && defined(_WIN32)
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.if \offset < 0
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adrp \rd, \val
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add \rd, \rd, :lo12:\val
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sub \rd, \rd, -(\offset)
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.else
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adrp \rd, \val+(\offset)
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add \rd, \rd, :lo12:\val+(\offset)
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.endif
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#elif CONFIG_PIC
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# if __has_feature(hwaddress_sanitizer)
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adrp \rd, :pg_hi21_nc:\val+(\offset)
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# else
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adrp \rd, \val+(\offset)
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# endif
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add \rd, \rd, :lo12:\val+(\offset)
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#else
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ldr \rd, =\val+\offset
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#endif
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.endm
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#define GLUE(a, b) a ## b
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#define JOIN(a, b) GLUE(a, b)
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#define X(s) JOIN(EXTERN_ASM, s)
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#define x18 do_not_use_x18
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#define w18 do_not_use_w18
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